Xiaokun Yang, Ph.D.
Assistant Professor of Computer Engineering,
College of Science and Engineering
Dr. Xiaokun Yang received his Ph.D. from the Department of Electrical and Computer Engineering (ECE), Florida International University (FIU), USA in Spring 2016, his dual M.S. from the Department of ECE at FIU and the Department of Software Engineering at Beihang University, China in 2007. He is currently an Assistant Professor at the College of Science and Engineering, University of Houston, Clear Lake.
From 2007 to 2012, he has also worked as a Senior ASIC Design/Layout Engineer at Advanced Micro Devices (AMD), China Electronic Corporation (CEC), and PowerLayer MicroSystems (PLM). His chip tape-out experiences include AMD CPUs/APUs (Kabini, Kaveri, Bonaire, Kryptos, and Samara), 802.11 a/b/g/n MIMO mixed-signal SoCs (CEC TL3 and TL5), and PLM high-definition TV (HDTV) SoCs (PLM3K and PLM5K).
- X. Yang, N. Wu, J. H. Andrian, ``Comparative Power Analysis of An Adaptive Bus Encoding Method on The MBUS Structure,'' Hindawi, VLSI Design, Under Review, 2017.
- X. Yang, X. He, ``Demo Abstract: Establishing a BLE Mesh Network using Fabricated CSRmesh Devices,'' The 2nd ACM/IEEE Symposium on Edge Computing (SEC) Poster, Accepted, In Press, Aug. 2017.
- X. Yang, W. Wen, ``Improving AES Core Performance via An Advanced IBUS Protocol,'' ACM Journal on Emerging Technologies in Computing (ACM JETC). (IF: 0.803), Accepted, In Press, June 2017.
- X. Yang, N. Wu, ``Design of A Bio-Feedback Digital System (BFS) Using 33-Step Training Table for Cardio Equipment,'' the 8th Intl. Conference on Applied Human Factors and Ergonomics (AHFE 2017), Vol. 603, PP. 53-64, June 2017.
- X. Yang, Y. Zhang, W. Wen, and M. Fan, ``A Case Study of Self-Organization Algorithms for High-Efficiency System-on-Chips Integration,'' IEEE Intl. Conf. on Autonomic Computing (ICAC) – Workshop on Feedback Computing, July 17, 2017.
- X. Yang, W. Wen, ``Design of A Pre-Scheduled Data Bus (DBUS) for Advanced Encryption Standard (AES) Encrypted System-on-Chips (SoCs),'' The 22nd Asia and South Pacific Design Automation Conference, (ASP-DAC2017), PP. 506-511, Jan. 2017, (Regular Paper, Acceptance Rate:111/358=31%).
- M. Fan, Q. Han, X. Yang, ``Energy Minimization for On-Line Real-Time Scheduling with Reliability Awareness,'' Elsevier Journal of Systems and Software. (Elsevier JSS), (IF: 1.424), Vol. 127, PP. 168-176, May 2017.
- Gajjar, X. Yang, RA Student Project−``Poster Abstract: A Smart Building System Integrated with An Edge Computing Algorithm and IoT Mesh Networks,'' The Second ACM/IEEE Symposium on Edge Computing (SEC 2017), Accepted, In Press, July 2017.
- P. Vangali, X. Yang, RA Student Project−``A Compression Algorithm Design and Simulation for Processing Large Volumes of Data from Wireless Sensor Networks,'' Communications on Applied Electronics (CAE), Vol. 7, Issue 4, PP. 1-5, June 2017.
- J. Thota, P. Vangali, X. Yang, Capstone Project−``Prototyping An Autonomous Eye-Controlled System (AECS) Using Raspberry-Pi on Wheelchairs,'' Intl. Journal of Compt. Applications (IJCA), Vol. 158, Issue 8, PP.1-7, Jan., 2017.
Courses (Current Academic Year)
- Graduate course
- CENG 5534 Advanced Digital System Design
- Undergraduate course
- CENG 4345 Digital System Design
- CENG 3316 Electronics
- CENG 3116 Electronics Lab
- Fog/Edge Computing
- Low Energy IoT Mesh Technology
- High Performance System-on-Chip Architecture
- Computer-Aided ASIC/FPGA Design and Verification Methodology
Awards and Accomplishments
- PI: Cisco Research & Open Innovation, Pending, 2017-2018
- PI: Faculty Fellowship Funds, Pending, 2017-2018
- PI: Faculty Research and Support Funds (FRSF), 2016-2017
- PI: Faculty Development Funds: ICAC2017, ASAP2017
- NSF Travel Grant, IEEE Intl. Conf. on Autonomic Computing (ICAC), 2017
- Dissertation Year Fellow, 2016
- Journal Reviewer: TVLSI; IET CDT; Integration, the VLSI; JEE; etc.
- TPC member: MicDAT2018; Nanoarch2017; EEEIS2017; CST2017; etc.